/*
 * libbinrec: a recompiling translator for machine code
 * Copyright (c) 2016 Andrew Church <achurch@achurch.org>
 *
 * This software may be copied and redistributed under certain conditions;
 * see the file "COPYING" in the source code distribution for details.
 * NO WARRANTY is provided with this software.
 */

#include "tests/guest-ppc/insn/common.h"

static const uint8_t input[] = {
    0x10,0x22,0x18,0x2A,  // ps_add f1,f2,f3
};

static const unsigned int guest_opt = BINREC_OPT_G_PPC_IGNORE_FPSCR_VXFOO;
static const unsigned int common_opt = BINREC_OPT_NATIVE_IEEE_NAN;

static const bool expected_success = true;

static const char expected[] =
    "[info] Scanning terminated at requested limit 0x3\n"
    "    0: LOAD_ARG   r1, 0\n"
    "    1: LOAD_ARG   r2, 1\n"
    "    2: GET_ALIAS  r3, a3\n"
    "    3: GET_ALIAS  r4, a4\n"
    "    4: FADD       r5, r3, r4\n"
    "    5: VFCVT      r6, r5\n"
    "    6: LOAD_IMM   r7, 0x1000000\n"
    "    7: VEXTRACT   r8, r6, 1\n"
    "    8: BITCAST    r9, r8\n"
    "    9: SLLI       r10, r9, 1\n"
    "   10: SEQ        r11, r10, r7\n"
    "   11: GOTO_IF_NZ r11, L1\n"
    "   12: VEXTRACT   r12, r6, 0\n"
    "   13: BITCAST    r13, r12\n"
    "   14: SLLI       r14, r13, 1\n"
    "   15: SEQ        r15, r14, r7\n"
    "   16: GOTO_IF_Z  r15, L2\n"
    "   17: LABEL      L1\n"
    "   18: FGETSTATE  r16\n"
    "   19: FSETROUND  r17, r16, TRUNC\n"
    "   20: FSETSTATE  r17\n"
    "   21: FADD       r18, r3, r4\n"
    "   22: VFCVT      r19, r18\n"
    "   23: FGETSTATE  r20\n"
    "   24: FCOPYROUND r21, r20, r16\n"
    "   25: FSETSTATE  r21\n"
    "   26: LABEL      L2\n"
    "   27: GET_ALIAS  r22, a5\n"
    "   28: FGETSTATE  r23\n"
    "   29: FCLEAREXC  r24, r23\n"
    "   30: FSETSTATE  r24\n"
    "   31: VFCVT      r25, r6\n"
    "   32: SET_ALIAS  a2, r25\n"
    "   33: VEXTRACT   r26, r6, 0\n"
    "   34: BITCAST    r27, r26\n"
    "   35: SGTUI      r28, r27, 0\n"
    "   36: SRLI       r29, r27, 31\n"
    "   37: BFEXT      r33, r27, 23, 8\n"
    "   38: SEQI       r30, r33, 0\n"
    "   39: SEQI       r31, r33, 255\n"
    "   40: SLLI       r34, r27, 9\n"
    "   41: SEQI       r32, r34, 0\n"
    "   42: AND        r35, r30, r32\n"
    "   43: XORI       r36, r32, 1\n"
    "   44: AND        r37, r31, r36\n"
    "   45: AND        r38, r30, r28\n"
    "   46: OR         r39, r38, r37\n"
    "   47: OR         r40, r35, r37\n"
    "   48: XORI       r41, r40, 1\n"
    "   49: XORI       r42, r29, 1\n"
    "   50: AND        r43, r29, r41\n"
    "   51: AND        r44, r42, r41\n"
    "   52: SLLI       r45, r39, 4\n"
    "   53: SLLI       r46, r43, 3\n"
    "   54: SLLI       r47, r44, 2\n"
    "   55: SLLI       r48, r35, 1\n"
    "   56: OR         r49, r45, r46\n"
    "   57: OR         r50, r47, r48\n"
    "   58: OR         r51, r49, r31\n"
    "   59: OR         r52, r51, r50\n"
    "   60: FTESTEXC   r53, r23, INEXACT\n"
    "   61: SLLI       r54, r53, 5\n"
    "   62: OR         r55, r52, r54\n"
    "   63: GET_ALIAS  r56, a5\n"
    "   64: BFINS      r57, r56, r55, 12, 7\n"
    "   65: SET_ALIAS  a5, r57\n"
    "   66: GOTO_IF_Z  r53, L4\n"
    "   67: GET_ALIAS  r58, a5\n"
    "   68: NOT        r59, r58\n"
    "   69: ORI        r60, r58, 33554432\n"
    "   70: ANDI       r61, r59, 33554432\n"
    "   71: SET_ALIAS  a5, r60\n"
    "   72: GOTO_IF_Z  r61, L5\n"
    "   73: ORI        r62, r60, -2147483648\n"
    "   74: SET_ALIAS  a5, r62\n"
    "   75: LABEL      L5\n"
    "   76: LABEL      L4\n"
    "   77: FTESTEXC   r63, r23, OVERFLOW\n"
    "   78: GOTO_IF_Z  r63, L6\n"
    "   79: GET_ALIAS  r64, a5\n"
    "   80: NOT        r65, r64\n"
    "   81: ORI        r66, r64, 268435456\n"
    "   82: ANDI       r67, r65, 268435456\n"
    "   83: SET_ALIAS  a5, r66\n"
    "   84: GOTO_IF_Z  r67, L7\n"
    "   85: ORI        r68, r66, -2147483648\n"
    "   86: SET_ALIAS  a5, r68\n"
    "   87: LABEL      L7\n"
    "   88: LABEL      L6\n"
    "   89: FTESTEXC   r69, r23, UNDERFLOW\n"
    "   90: GOTO_IF_Z  r69, L3\n"
    "   91: GET_ALIAS  r70, a5\n"
    "   92: NOT        r71, r70\n"
    "   93: ORI        r72, r70, 134217728\n"
    "   94: ANDI       r73, r71, 134217728\n"
    "   95: SET_ALIAS  a5, r72\n"
    "   96: GOTO_IF_Z  r73, L8\n"
    "   97: ORI        r74, r72, -2147483648\n"
    "   98: SET_ALIAS  a5, r74\n"
    "   99: LABEL      L8\n"
    "  100: LABEL      L3\n"
    "  101: LOAD_IMM   r75, 4\n"
    "  102: SET_ALIAS  a1, r75\n"
    "  103: RETURN     r1\n"
    "\n"
    "Alias 1: int32 @ 964(r1)\n"
    "Alias 2: float64[2] @ 400(r1)\n"
    "Alias 3: float64[2] @ 416(r1)\n"
    "Alias 4: float64[2] @ 432(r1)\n"
    "Alias 5: int32 @ 944(r1)\n"
    "\n"
    "Block 0: <none> --> [0,11] --> 1,2\n"
    "Block 1: 0 --> [12,16] --> 2,3\n"
    "Block 2: 1,0 --> [17,25] --> 3\n"
    "Block 3: 2,1 --> [26,66] --> 4,7\n"
    "Block 4: 3 --> [67,72] --> 5,6\n"
    "Block 5: 4 --> [73,74] --> 6\n"
    "Block 6: 5,4 --> [75,75] --> 7\n"
    "Block 7: 6,3 --> [76,78] --> 8,11\n"
    "Block 8: 7 --> [79,84] --> 9,10\n"
    "Block 9: 8 --> [85,86] --> 10\n"
    "Block 10: 9,8 --> [87,87] --> 11\n"
    "Block 11: 10,7 --> [88,90] --> 12,15\n"
    "Block 12: 11 --> [91,96] --> 13,14\n"
    "Block 13: 12 --> [97,98] --> 14\n"
    "Block 14: 13,12 --> [99,99] --> 15\n"
    "Block 15: 14,11 --> [100,103] --> <none>\n"
    ;

#include "tests/rtl-disasm-test.i"