/*
 * libbinrec: a recompiling translator for machine code
 * Copyright (c) 2016 Andrew Church <achurch@achurch.org>
 *
 * This software may be copied and redistributed under certain conditions;
 * see the file "COPYING" in the source code distribution for details.
 * NO WARRANTY is provided with this software.
 */

#include "tests/guest-ppc/insn/common.h"

static const uint8_t input[] = {
    0x13,0x81,0x10,0xC0,  // ps_cmpo1 cr7,f1,f2
};

static const unsigned int guest_opt = BINREC_OPT_G_PPC_ASSUME_NO_SNAN;
static const unsigned int common_opt = 0;

static const bool expected_success = true;

static const char expected[] =
    "[info] Scanning terminated at requested limit 0x3\n"
    "    0: LOAD_ARG   r1, 0\n"
    "    1: LOAD_ARG   r2, 1\n"
    "    2: GET_ALIAS  r3, a2\n"
    "    3: VEXTRACT   r4, r3, 1\n"
    "    4: FGETSTATE  r5\n"
    "    5: FCVT       r6, r4\n"
    "    6: FSETSTATE  r5\n"
    "    7: GET_ALIAS  r7, a3\n"
    "    8: VEXTRACT   r8, r7, 1\n"
    "    9: FGETSTATE  r9\n"
    "   10: FCVT       r10, r8\n"
    "   11: FSETSTATE  r9\n"
    "   12: FCMP       r11, r6, r10, OLT\n"
    "   13: FCMP       r12, r6, r10, OGT\n"
    "   14: FCMP       r13, r6, r10, OEQ\n"
    "   15: FCMP       r14, r6, r10, OUN\n"
    "   16: GET_ALIAS  r15, a4\n"
    "   17: SLLI       r16, r11, 3\n"
    "   18: SLLI       r17, r12, 2\n"
    "   19: SLLI       r18, r13, 1\n"
    "   20: OR         r19, r16, r17\n"
    "   21: OR         r20, r18, r14\n"
    "   22: OR         r21, r19, r20\n"
    "   23: BFINS      r22, r15, r21, 0, 4\n"
    "   24: SET_ALIAS  a4, r22\n"
    "   25: GET_ALIAS  r23, a5\n"
    "   26: BFEXT      r24, r23, 12, 7\n"
    "   27: ANDI       r25, r24, 112\n"
    "   28: SLLI       r26, r11, 3\n"
    "   29: SLLI       r27, r12, 2\n"
    "   30: SLLI       r28, r13, 1\n"
    "   31: OR         r29, r26, r27\n"
    "   32: OR         r30, r28, r14\n"
    "   33: OR         r31, r29, r30\n"
    "   34: OR         r32, r25, r31\n"
    "   35: GET_ALIAS  r33, a5\n"
    "   36: BFINS      r34, r33, r32, 12, 7\n"
    "   37: SET_ALIAS  a5, r34\n"
    "   38: FGETSTATE  r35\n"
    "   39: FTESTEXC   r36, r35, INVALID\n"
    "   40: GOTO_IF_Z  r36, L1\n"
    "   41: FCLEAREXC  r37, r35\n"
    "   42: FSETSTATE  r37\n"
    "   43: BITCAST    r38, r6\n"
    "   44: SLLI       r39, r38, 10\n"
    "   45: BFEXT      r40, r38, 22, 9\n"
    "   46: SEQI       r41, r40, 510\n"
    "   47: GOTO_IF_Z  r41, L3\n"
    "   48: GOTO_IF_NZ r39, L2\n"
    "   49: LABEL      L3\n"
    "   50: BITCAST    r42, r10\n"
    "   51: SLLI       r43, r42, 10\n"
    "   52: BFEXT      r44, r42, 22, 9\n"
    "   53: SEQI       r45, r44, 510\n"
    "   54: GOTO_IF_Z  r45, L4\n"
    "   55: GOTO_IF_NZ r43, L2\n"
    "   56: LABEL      L4\n"
    "   57: NOT        r46, r34\n"
    "   58: ORI        r47, r34, 524288\n"
    "   59: ANDI       r48, r46, 524288\n"
    "   60: SET_ALIAS  a5, r47\n"
    "   61: GOTO_IF_Z  r48, L5\n"
    "   62: ORI        r49, r47, -2147483648\n"
    "   63: SET_ALIAS  a5, r49\n"
    "   64: LABEL      L5\n"
    "   65: GOTO       L1\n"
    "   66: LABEL      L2\n"
    "   67: ANDI       r50, r34, 128\n"
    "   68: GOTO_IF_NZ r50, L6\n"
    "   69: NOT        r51, r34\n"
    "   70: ORI        r52, r34, 17301504\n"
    "   71: ANDI       r53, r51, 17301504\n"
    "   72: SET_ALIAS  a5, r52\n"
    "   73: GOTO_IF_Z  r53, L7\n"
    "   74: ORI        r54, r52, -2147483648\n"
    "   75: SET_ALIAS  a5, r54\n"
    "   76: LABEL      L7\n"
    "   77: GOTO       L1\n"
    "   78: LABEL      L6\n"
    "   79: NOT        r55, r34\n"
    "   80: ORI        r56, r34, 16777216\n"
    "   81: ANDI       r57, r55, 16777216\n"
    "   82: SET_ALIAS  a5, r56\n"
    "   83: GOTO_IF_Z  r57, L8\n"
    "   84: ORI        r58, r56, -2147483648\n"
    "   85: SET_ALIAS  a5, r58\n"
    "   86: LABEL      L8\n"
    "   87: LABEL      L1\n"
    "   88: LOAD_IMM   r59, 4\n"
    "   89: SET_ALIAS  a1, r59\n"
    "   90: RETURN     r1\n"
    "\n"
    "Alias 1: int32 @ 964(r1)\n"
    "Alias 2: float64[2] @ 400(r1)\n"
    "Alias 3: float64[2] @ 416(r1)\n"
    "Alias 4: int32 @ 928(r1)\n"
    "Alias 5: int32 @ 944(r1)\n"
    "\n"
    "Block 0: <none> --> [0,40] --> 1,15\n"
    "Block 1: 0 --> [41,47] --> 2,3\n"
    "Block 2: 1 --> [48,48] --> 3,8\n"
    "Block 3: 2,1 --> [49,54] --> 4,5\n"
    "Block 4: 3 --> [55,55] --> 5,8\n"
    "Block 5: 4,3 --> [56,61] --> 6,7\n"
    "Block 6: 5 --> [62,63] --> 7\n"
    "Block 7: 6,5 --> [64,65] --> 15\n"
    "Block 8: 2,4 --> [66,68] --> 9,12\n"
    "Block 9: 8 --> [69,73] --> 10,11\n"
    "Block 10: 9 --> [74,75] --> 11\n"
    "Block 11: 10,9 --> [76,77] --> 15\n"
    "Block 12: 8 --> [78,83] --> 13,14\n"
    "Block 13: 12 --> [84,85] --> 14\n"
    "Block 14: 13,12 --> [86,86] --> 15\n"
    "Block 15: 14,0,7,11 --> [87,90] --> <none>\n"
    ;

#include "tests/rtl-disasm-test.i"