/*
 * libbinrec: a recompiling translator for machine code
 * Copyright (c) 2016 Andrew Church <achurch@achurch.org>
 *
 * This software may be copied and redistributed under certain conditions;
 * see the file "COPYING" in the source code distribution for details.
 * NO WARRANTY is provided with this software.
 */

#include "tests/common.h"
#include "tests/host-x86/common.h"


static const binrec_setup_t setup = {
    .host = BINREC_ARCH_X86_64_SYSV,
};
static const unsigned int host_opt = BINREC_OPT_H_X86_FIXED_REGS;

static int add_rtl(RTLUnit *unit)
{
    int reg1, alias, label1;
    EXPECT(reg1 = rtl_alloc_register(unit, RTLTYPE_ADDRESS));
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_ARG, reg1, 0, 0, 0));
    EXPECT(alias = rtl_alloc_alias_register(unit, RTLTYPE_INT32));
    rtl_set_alias_storage(unit, alias, reg1, 0x1234);
    EXPECT(label1 = rtl_alloc_label(unit));
    EXPECT(rtl_add_insn(unit, RTLOP_GOTO, 0, 0, 0, label1));

    int reg2, reg3, reg4, label2, label3;
    EXPECT(label2 = rtl_alloc_label(unit));
    EXPECT(rtl_add_insn(unit, RTLOP_LABEL, 0, 0, 0, label2));
    EXPECT(reg2 = rtl_alloc_register(unit, RTLTYPE_INT32));
    /* reg2 should be allocated ECX by fixed-regs and merged with reg6
     * below, but since ECX is live past the conditional branch, the merge
     * should trigger an alias conflict. */
    EXPECT(rtl_add_insn(unit, RTLOP_GET_ALIAS, reg2, 0, 0, alias));
    EXPECT(reg3 = rtl_alloc_register(unit, RTLTYPE_INT32));
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg3, 0, 0, 3));
    EXPECT(reg4 = rtl_alloc_register(unit, RTLTYPE_INT32));
    EXPECT(rtl_add_insn(unit, RTLOP_SLL, reg4, reg3, reg2, alias));
    EXPECT(rtl_add_insn(unit, RTLOP_SET_ALIAS, 0, reg4, 0, alias));
    EXPECT(label3 = rtl_alloc_label(unit));
    EXPECT(rtl_add_insn(unit, RTLOP_GOTO, 0, 0, 0, label3));

    int reg5, reg6, reg7;
    EXPECT(rtl_add_insn(unit, RTLOP_LABEL, 0, 0, 0, label1));
    EXPECT(reg5 = rtl_alloc_register(unit, RTLTYPE_INT32));
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg5, 0, 0, 5));  // Gets EAX.
    EXPECT(reg6 = rtl_alloc_register(unit, RTLTYPE_INT32));
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg6, 0, 0, 6));  // Gets ECX.
    EXPECT(reg7 = rtl_alloc_register(unit, RTLTYPE_INT32));
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg7, 0, 0, 7));  // Gets EDX.
    EXPECT(rtl_add_insn(unit, RTLOP_NOP, 0, reg5, 0, 0));
    EXPECT(rtl_add_insn(unit, RTLOP_SET_ALIAS, 0, reg7, 0, alias));
    EXPECT(rtl_add_insn(unit, RTLOP_GOTO_IF_Z, 0, reg6, 0, label2));

    EXPECT(rtl_add_insn(unit, RTLOP_LABEL, 0, 0, 0, label3));
    EXPECT(rtl_add_insn(unit, RTLOP_NOP, 0, reg1, reg6, 0));
    return EXIT_SUCCESS;
}

static const uint8_t expected_code[] = {
    0x48,0x83,0xEC,0x08,                // sub $8,%rsp
    0xE9,0x12,0x00,0x00,0x00,           // jmp L1
    0xB8,0x03,0x00,0x00,0x00,           // L2: mov $3,%eax
    0xD3,0xE0,                          // shl %cl,%eax
    0x89,0x87,0x34,0x12,0x00,0x00,      // mov %eax,0x1234(%rdi)
    0xE9,0x1D,0x00,0x00,0x00,           // jmp L3
    0xB8,0x05,0x00,0x00,0x00,           // L1: mov $5,%eax
    0xB9,0x06,0x00,0x00,0x00,           // mov $6,%ecx
    0xBA,0x07,0x00,0x00,0x00,           // mov $7,%edx
    0x89,0x97,0x34,0x12,0x00,0x00,      // mov %edx,0x1234(%rdi)
    0x85,0xC9,                          // test %ecx,%ecx
    0x75,0x04,                          // jnz L3
    0x8B,0xCA,                          // mov %edx,%ecx
    0xEB,0xD1,                          // jmp L2
    0x48,0x83,0xC4,0x08,                // L3: add $8,%rsp
    0xC3,                               // ret
};

static const char expected_log[] = "";

#include "tests/rtl-translate-test.i"