/*
 * libbinrec: a recompiling translator for machine code
 * Copyright (c) 2016 Andrew Church <achurch@achurch.org>
 *
 * This software may be copied and redistributed under certain conditions;
 * see the file "COPYING" in the source code distribution for details.
 * NO WARRANTY is provided with this software.
 */

#include "tests/common.h"
#include "tests/host-x86/common.h"


static const binrec_setup_t setup = {
    .host = BINREC_ARCH_X86_64_SYSV,
};
static const unsigned int host_opt = 0;

static int add_rtl(RTLUnit *unit)
{
    int reg1, reg2, reg3, alias, label1;
    EXPECT(reg1 = rtl_alloc_register(unit, RTLTYPE_ADDRESS));
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_ARG, reg1, 0, 0, 0));
    EXPECT(alias = rtl_alloc_alias_register(unit, RTLTYPE_INT32));
    rtl_set_alias_storage(unit, alias, reg1, 0x1234);
    EXPECT(label1 = rtl_alloc_label(unit));
    EXPECT(reg2 = rtl_alloc_register(unit, RTLTYPE_INT32));
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg2, 0, 0, 2));  // Gets EAX.
    EXPECT(reg3 = rtl_alloc_register(unit, RTLTYPE_INT32));
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg3, 0, 0, 3));  // Gets ECX.
    EXPECT(rtl_add_insn(unit, RTLOP_SET_ALIAS, 0, reg3, 0, alias));
    EXPECT(rtl_add_insn(unit, RTLOP_GOTO_IF_Z, 0, reg3, 0, label1));

    int reg4, label2;
    EXPECT(reg4 = rtl_alloc_register(unit, RTLTYPE_INT32));
    /* Allocate ECX (live through the end of the unit) to prevent merging
     * to the same register. */
    EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg4, 0, 0, 4));
    /* Force EAX to be live past the conditional branch. */
    EXPECT(rtl_add_insn(unit, RTLOP_NOP, 0, reg2, 0, 1));
    /* Don't fall through so that the GET_ALIAS below can be merged without
     * loading. */
    EXPECT(label2 = rtl_alloc_label(unit));
    EXPECT(rtl_add_insn(unit, RTLOP_GOTO, 0, 0, 0, label2));

    /* This block is unreachable, but we set up a bunch of aliases here
     * which are merged into the next block in order to pad the alias setup
     * code to the point where a 32-bit displacement is required to jump
     * over it. */
    int pad_alias[15], pad_reg[15];
    STATIC_ASSERT(lenof(pad_alias) == lenof(pad_reg), "Array length mismatch");
    for (int i = 0; i < lenof(pad_alias); i++) {
        EXPECT(pad_alias[i] = rtl_alloc_alias_register(unit, RTLTYPE_FLOAT32));
        rtl_set_alias_storage(unit, pad_alias[i], reg1, 0x100+i*4);
        EXPECT(pad_reg[i] = rtl_alloc_register(unit, RTLTYPE_FLOAT32));
        EXPECT(rtl_add_insn(unit, RTLOP_GET_ALIAS,
                            pad_reg[i], 0, 0, pad_alias[i]));
        EXPECT(rtl_add_insn(unit, RTLOP_SET_ALIAS,
                            0, pad_reg[i], 0, pad_alias[i]));
    }

    int reg5;
    EXPECT(rtl_add_insn(unit, RTLOP_LABEL, 0, 0, 0, label1));
    EXPECT(reg5 = rtl_alloc_register(unit, RTLTYPE_INT32));
    /* reg5 should be merged with reg3 via EAX.  Since EAX is live past the
     * conditional branch above, the merge should trigger an alias conflict
     * which will flip the sense of the conditional branch so the merge can
     * be performed conditionally. */
    EXPECT(rtl_add_insn(unit, RTLOP_GET_ALIAS, reg5, 0, 0, alias));
    EXPECT(rtl_add_insn(unit, RTLOP_SET_ALIAS, 0, reg5, 0, alias));
    /* Also reload the padding aliases to trigger merging. */
    for (int i = 0; i < lenof(pad_alias); i++) {
        int reg;
        EXPECT(reg = rtl_alloc_register(unit, RTLTYPE_FLOAT32));
        EXPECT(rtl_add_insn(unit, RTLOP_GET_ALIAS, reg, 0, 0, pad_alias[i]));
    }

    EXPECT(rtl_add_insn(unit, RTLOP_LABEL, 0, 0, 0, label2));
    EXPECT(rtl_add_insn(unit, RTLOP_NOP, 0, reg1, reg4, 0));
    return EXIT_SUCCESS;
}

static const uint8_t expected_code[] = {
    0x48,0x83,0xEC,0x08,                // sub $8,%rsp
    0xB8,0x02,0x00,0x00,0x00,           // mov $2,%eax
    0xB9,0x03,0x00,0x00,0x00,           // mov $3,%ecx
    0x89,0x8F,0x34,0x12,0x00,0x00,      // mov %ecx,0x1234(%rdi)
    0x85,0xC9,                          // test %ecx,%ecx
    0x0F,0x85,0x86,0x00,0x00,0x00,      // jnz L0
    0x8B,0xC1,                          // mov %ecx,%eax
    0xF3,0x0F,0x10,0x87,0x00,0x01,0x00,0x00,      // movss 0x100(%rdi),%xmm0
    0xF3,0x0F,0x10,0x8F,0x04,0x01,0x00,0x00,      // movss 0x104(%rdi),%xmm1
    0xF3,0x0F,0x10,0x97,0x08,0x01,0x00,0x00,      // movss 0x108(%rdi),%xmm2
    0xF3,0x0F,0x10,0x9F,0x0C,0x01,0x00,0x00,      // movss 0x10C(%rdi),%xmm3
    0xF3,0x0F,0x10,0xA7,0x10,0x01,0x00,0x00,      // movss 0x110(%rdi),%xmm4
    0xF3,0x0F,0x10,0xAF,0x14,0x01,0x00,0x00,      // movss 0x114(%rdi),%xmm5
    0xF3,0x0F,0x10,0xB7,0x18,0x01,0x00,0x00,      // movss 0x118(%rdi),%xmm6
    0xF3,0x0F,0x10,0xBF,0x1C,0x01,0x00,0x00,      // movss 0x11C(%rdi),%xmm7
    0xF3,0x44,0x0F,0x10,0x87,0x20,0x01,0x00,0x00, // movss 0x120(%rdi),%xmm8
    0xF3,0x44,0x0F,0x10,0x8F,0x24,0x01,0x00,0x00, // movss 0x124(%rdi),%xmm9
    0xF3,0x44,0x0F,0x10,0x97,0x28,0x01,0x00,0x00, // movss 0x128(%rdi),%xmm10
    0xF3,0x44,0x0F,0x10,0x9F,0x2C,0x01,0x00,0x00, // movss 0x12C(%rdi),%xmm11
    0xF3,0x44,0x0F,0x10,0xA7,0x30,0x01,0x00,0x00, // movss 0x130(%rdi),%xmm12
    0xF3,0x44,0x0F,0x10,0xAF,0x34,0x01,0x00,0x00, // movss 0x134(%rdi),%xmm13
    0xF3,0x44,0x0F,0x10,0xB7,0x38,0x01,0x00,0x00, // movss 0x138(%rdi),%xmm14
    0xE9,0x15,0x01,0x00,0x00,           // jmp L1
    0xB9,0x04,0x00,0x00,0x00,           // L0: mov $4,%ecx
    0x0F,0x1F,0x05,0x01,0x00,0x00,0x00, // nopl 1(%rip)
    0xE9,0x0A,0x01,0x00,0x00,           // jmp L2
    0xF3,0x0F,0x10,0x87,0x00,0x01,0x00,0x00,      // movss 0x100(%rdi),%xmm0
    0xF3,0x0F,0x11,0x87,0x00,0x01,0x00,0x00,      // movss %xmm0,0x100(%rdi)
    0xF3,0x0F,0x10,0x8F,0x04,0x01,0x00,0x00,      // movss 0x104(%rdi),%xmm1
    0xF3,0x0F,0x11,0x8F,0x04,0x01,0x00,0x00,      // movss %xmm1,0x104(%rdi)
    0xF3,0x0F,0x10,0x97,0x08,0x01,0x00,0x00,      // movss 0x108(%rdi),%xmm2
    0xF3,0x0F,0x11,0x97,0x08,0x01,0x00,0x00,      // movss %xmm2,0x108(%rdi)
    0xF3,0x0F,0x10,0x9F,0x0C,0x01,0x00,0x00,      // movss 0x10C(%rdi),%xmm3
    0xF3,0x0F,0x11,0x9F,0x0C,0x01,0x00,0x00,      // movss %xmm3,0x10C(%rdi)
    0xF3,0x0F,0x10,0xA7,0x10,0x01,0x00,0x00,      // movss 0x110(%rdi),%xmm4
    0xF3,0x0F,0x11,0xA7,0x10,0x01,0x00,0x00,      // movss %xmm4,0x110(%rdi)
    0xF3,0x0F,0x10,0xAF,0x14,0x01,0x00,0x00,      // movss 0x114(%rdi),%xmm5
    0xF3,0x0F,0x11,0xAF,0x14,0x01,0x00,0x00,      // movss %xmm5,0x114(%rdi)
    0xF3,0x0F,0x10,0xB7,0x18,0x01,0x00,0x00,      // movss 0x118(%rdi),%xmm6
    0xF3,0x0F,0x11,0xB7,0x18,0x01,0x00,0x00,      // movss %xmm6,0x118(%rdi)
    0xF3,0x0F,0x10,0xBF,0x1C,0x01,0x00,0x00,      // movss 0x11C(%rdi),%xmm7
    0xF3,0x0F,0x11,0xBF,0x1C,0x01,0x00,0x00,      // movss %xmm7,0x11C(%rdi)
    0xF3,0x44,0x0F,0x10,0x87,0x20,0x01,0x00,0x00, // movss 0x120(%rdi),%xmm8
    0xF3,0x44,0x0F,0x11,0x87,0x20,0x01,0x00,0x00, // movss %xmm8,0x120(%rdi)
    0xF3,0x44,0x0F,0x10,0x8F,0x24,0x01,0x00,0x00, // movss 0x124(%rdi),%xmm9
    0xF3,0x44,0x0F,0x11,0x8F,0x24,0x01,0x00,0x00, // movss %xmm9,0x124(%rdi)
    0xF3,0x44,0x0F,0x10,0x97,0x28,0x01,0x00,0x00, // movss 0x128(%rdi),%xmm10
    0xF3,0x44,0x0F,0x11,0x97,0x28,0x01,0x00,0x00, // movss %xmm10,0x128(%rdi)
    0xF3,0x44,0x0F,0x10,0x9F,0x2C,0x01,0x00,0x00, // movss 0x12C(%rdi),%xmm11
    0xF3,0x44,0x0F,0x11,0x9F,0x2C,0x01,0x00,0x00, // movss %xmm11,0x12C(%rdi)
    0xF3,0x44,0x0F,0x10,0xA7,0x30,0x01,0x00,0x00, // movss 0x130(%rdi),%xmm12
    0xF3,0x44,0x0F,0x11,0xA7,0x30,0x01,0x00,0x00, // movss %xmm12,0x130(%rdi)
    0xF3,0x44,0x0F,0x10,0xAF,0x34,0x01,0x00,0x00, // movss 0x134(%rdi),%xmm13
    0xF3,0x44,0x0F,0x11,0xAF,0x34,0x01,0x00,0x00, // movss %xmm13,0x134(%rdi)
    0xF3,0x44,0x0F,0x10,0xB7,0x38,0x01,0x00,0x00, // movss 0x138(%rdi),%xmm14
    0xF3,0x44,0x0F,0x11,0xB7,0x38,0x01,0x00,0x00, // movss %xmm14,0x138(%rdi)
    0x8B,0x87,0x34,0x12,0x00,0x00,      // mov 0x1234(%rdi),%eax
    0x89,0x87,0x34,0x12,0x00,0x00,      // L1: mov %eax,0x1234(%rdi)
    0x48,0x83,0xC4,0x08,                // L2: add $8,%rsp
    0xC3,                               // ret
};

static const char expected_log[] = "";

#include "tests/rtl-translate-test.i"