/* * libbinrec: a recompiling translator for machine code * Copyright (c) 2016 Andrew Church * * This software may be copied and redistributed under certain conditions; * see the file "COPYING" in the source code distribution for details. * NO WARRANTY is provided with this software. */ #include "tests/common.h" #include "tests/host-x86/common.h" static const binrec_setup_t setup = { .host = BINREC_ARCH_X86_64_SYSV, }; static const unsigned int host_opt = BINREC_OPT_H_X86_FIXED_REGS | BINREC_OPT_H_X86_MERGE_REGS; static int add_rtl(RTLUnit *unit) { int reg1, reg2, reg3, alias; EXPECT(reg1 = rtl_alloc_register(unit, RTLTYPE_ADDRESS)); EXPECT(rtl_add_insn(unit, RTLOP_LOAD_ARG, reg1, 0, 0, 0)); EXPECT(alias = rtl_alloc_alias_register(unit, RTLTYPE_INT32)); rtl_set_alias_storage(unit, alias, reg1, 0x1234); EXPECT(reg2 = rtl_alloc_register(unit, RTLTYPE_INT32)); EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg2, 0, 0, 2)); /* reg3 should get ECX, but the early merge will be cancelled by the * fixed-regs reservation for SHL in the next block. */ EXPECT(reg3 = rtl_alloc_register(unit, RTLTYPE_INT32)); EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg3, 0, 0, 3)); EXPECT(rtl_add_insn(unit, RTLOP_NOP, 0, reg2, 0, 0)); EXPECT(rtl_add_insn(unit, RTLOP_SET_ALIAS, 0, reg3, 0, alias)); int reg4, reg5, reg6, reg7, label; EXPECT(label = rtl_alloc_label(unit)); EXPECT(rtl_add_insn(unit, RTLOP_LABEL, 0, 0, 0, label)); /* reg4 should get ECX by fixed-regs, cancelling the early merge from * reg3. */ EXPECT(reg4 = rtl_alloc_register(unit, RTLTYPE_INT32)); EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg4, 0, 0, 4)); EXPECT(reg5 = rtl_alloc_register(unit, RTLTYPE_INT32)); EXPECT(rtl_add_insn(unit, RTLOP_LOAD_IMM, reg5, 0, 0, 5)); /* If we fill up the host register file, the allocator shouldn't get * confused by the merge having already been cancelled. */ int fill_regs[12]; for (int i = 0; i < lenof(fill_regs); i++) { EXPECT(fill_regs[i] = rtl_alloc_register(unit, RTLTYPE_INT32)); EXPECT(rtl_add_insn(unit, RTLOP_NOP, fill_regs[i], 0, 0, 0)); } for (int i = 0; i < lenof(fill_regs); i++) { EXPECT(rtl_add_insn(unit, RTLOP_NOP, 0, fill_regs[i], 0, 0)); } EXPECT(reg6 = rtl_alloc_register(unit, RTLTYPE_INT32)); EXPECT(rtl_add_insn(unit, RTLOP_SLL, reg6, reg5, reg4, 0)); /* Make sure reg5 (instead of reg4) is spilled by fill_regs. */ EXPECT(rtl_add_insn(unit, RTLOP_NOP, 0, reg5, 0, 0)); EXPECT(reg7 = rtl_alloc_register(unit, RTLTYPE_INT32)); EXPECT(rtl_add_insn(unit, RTLOP_GET_ALIAS, reg7, 0, 0, alias)); EXPECT(rtl_add_insn(unit, RTLOP_SET_ALIAS, 0, reg7, 0, alias)); EXPECT(rtl_add_insn(unit, RTLOP_NOP, 0, reg1, 0, 0)); return EXIT_SUCCESS; } static const uint8_t expected_code[] = { 0x53, // push %rbx 0x55, // push %rbp 0x41,0x54, // push %r12 0x41,0x55, // push %r13 0x41,0x56, // push %r14 0x48,0x83,0xEC,0x10, // sub $16,%rsp 0xB8,0x02,0x00,0x00,0x00, // mov $2,%eax 0xB9,0x03,0x00,0x00,0x00, // mov $3,%ecx 0x89,0x8F,0x34,0x12,0x00,0x00, // mov %ecx,0x1234(%rdi) 0xB9,0x04,0x00,0x00,0x00, // mov $4,%ecx 0xB8,0x05,0x00,0x00,0x00, // mov $5,%eax 0x89,0x04,0x24, // mov %eax,(%rsp) 0x8B,0x04,0x24, // mov (%rsp),%eax 0xD3,0xE0, // shl %cl,%eax 0x8B,0x87,0x34,0x12,0x00,0x00, // mov 0x1234(%rdi),%eax 0x89,0x87,0x34,0x12,0x00,0x00, // mov %eax,0x1234(%rdi) 0x48,0x83,0xC4,0x10, // add $16,%rsp 0x41,0x5E, // pop %r14 0x41,0x5D, // pop %r13 0x41,0x5C, // pop %r12 0x5D, // pop %rbp 0x5B, // pop %rbx 0xC3, // ret }; static const char expected_log[] = ""; #include "tests/rtl-translate-test.i"